Splash 2 board, containing Field Programmable Gate Arrays, which attaches to a workstation. It is programmed in the DOD standard VHDL language and can achieve high performance on problems such as DNA and protein sequence comparison.
Since computers were first built in the 1940s and 1950s, the structure of their processors has been fixed at the time of their construction. As a result, even the fastest computers will perform poorly on a computation whose structure is a bad match for that of the processor. This basic feature of processor architecture is changing with the use of Field Programmable Gate Arrays (FPGAs) as processor elements. The hardware of an FPGA-based computer is reconfigured for each application. In this way, the structure of the processor can be made to match the structure of the computation, and an FPGA-based computer can achieve supercomputer performance on a range of applications at a fraction of the cost. Importantly, the reconfiguration of the processor structure is done not by designing new computer hardware but by programming the FPGA-based computer in a standard high-level language.
The Splash 1 and Splash 2 attached processor systems, which were designed and built at the Supercomputing Research Center (SRC) using FPGAs from Xilinx, Inc., are just this kind of FPGA-based reconfigurable computer. Together with the National Cancer Institute, the SRC is writing software that will perform DNA and protein sequence comparisons and alignment on existing databases at speeds equal to or greater than those of supercomputers. Applications for Splash 2 are written in VHDL (the DOD standard Very High Speed Integrated Circuit Hardware Description Language). On applications running on Splash 2, performance equal to or as much as 100 times that of some conventional supercomputers has been achieved.
The CM-2X, built by Thinking Machines, Inc., for the SRC, is a CM-2 in which the Weitek floating point accelerator chips have been replaced by Xilinx FPGAs, which can be programmed with the usual CM-2 languages and utilities. It is common on multiprocessor machines to find such floating point accelerators; the use of FPGAs in their place allows computationally intensive kernels of an application to be executed on FPGA-based hardware specifically configured for the application. On complete applications programmed at the SRC, the CM-2X has achieved three to four times the performance of the CM- 2.
Similar approaches are being evaluated for other architectures. For example, the CM-5, also built by Thinking Machines, Inc., has from 32 to 1,024 network-connected nodes each consisting of a high performance microprocessor and four custom designed vector processors. Embedding FPGAs into its nodes and network offers the potential for producing dramatic improvement on specific applications and, by altering the FPGA programming, observation of internal system states to assist in program tuning and debugging.